OpenPulse — board-1¶
Source repo: EmbeddedEra/OpenPulse
Status: prototype
Schematic¶
View the real KiCad file directly in the browser via KiCanvas — no export step, no stale PDF.
Board¶
View the real KiCad file directly in the browser via KiCanvas — no export step, no stale PDF.
3D model¶
Drag to rotate, pinch or scroll to zoom, two fingers to pan. Built from the layout with the same 3D models as the renders.
Renders¶
Assembly: no placed parts (0 parts on top, 0 on the bottom, counted from the layout; fiducials, mounting holes and parts excluded from the BOM are not counted).
fab.yml says assembly_sides: top but the layout has parts on no placed parts — fix fab.yml (SOP-021 step 12).
Top
Bottom
Top isometric
Bottom isometric
InteractiveHtmlBom¶
The InteractiveHtmlBom — for the bench: click a BOM line and the part highlights on the board.
Manufacturing specs¶
| Requirement | Value |
|---|---|
| layers | 2 |
| thickness mm | 1.6 |
| material | FR-4 TG150 |
| copper oz outer | 1 |
| copper oz inner | n/a |
| surface finish | ENIG |
| solder mask | green |
| silkscreen | white |
| min track space mm | 0.15 / 0.15 |
| min via drill mm | 0.3 |
| via treatment | tented |
| impedance control | no |
| castellated holes | no |
| edge plating | no |
| panelisation | single piece, fab may panelise |
| rule file | EmbeddedEra_JLCPCB.kicad_dru |
| assembly sides | top |
| assembly type | SMT + THT |
| dnp policy | parts marked DNP in the schematic are omitted from the BOM and CPL |
| notes | none |
Checks¶
Source commit: f8e709631f7fb9813bcf221e12d2487ce0eca907
Last run: 2026-10-31 18:30 on f8e709631f7fb9813bcf221e12d2487ce0eca907 — cached run, hardware and checker unchanged
| File | ERC errors | ERC warnings | DRC errors | DRC warnings |
|---|---|---|---|---|
| hardware/board-1/board-1.kicad_sch | 0 | 2 | 0 | 0 |
CI ("KiCad checks") on f8e709631f7fb9813bcf221e12d2487ce0eca907: failure, 2026-10-31T12:50:10Z
Releases¶
No hw/ releases yet.
ERP¶
No product.yml IPN recorded for this board.